The present invention is directed to using copper or copper alloys in semiconductor devices, and is especially directed to improving the adhesion of another layer to the copper or copper alloy.
Interest in using copper as interconnects in semiconductor devices continues to increase since it possesses a lower resistivity and a reduced susceptibility to electromigration failure as compared to the more traditional aluminum or aluminum alloy interconnects.
However, since copper has a tendency when used in interconnect metallurgy to diffuse into surrounding dielectric materials such as silicon dioxide, capping of the copper is essential. The capping inhibits this diffusion. One widely suggested method of capping includes employing a conductive barrier layer along the sidewalls and bottom surface of a copper interconnect. Typical of such barrier layers is tantalum or titanium. Capping of the upper surface of a copper interconnect usually employs silicon nitride.
However, silicon nitride does not exhibit strong adhesion to copper surfaces. Accordingly, the silicon nitride-to-copper interface is extremely susceptible to delamination, especially under conditions of mechanical loading. Examples of instances where mechanical loading can lead to delamination include chemical-mechanical polishing steps during wafer processing, chip pull such as used in substrate rework, and removal of chips after burn-in from a temporary attach substrate.
Delamination of silicon nitride from a copper surface creates a path for copper to diffuse outward and a path for moisture or other contaminants to diffuse inward. This creates reliability problems for the semiconductor device.
Moreover, various other materials such as silicon dioxide do not adhere well to copper surfaces.
It has been suggested to use a copper silicide film on copper interconnects to eliminate the silicon nitride-to-copper interface adhesion problems. Along these lines, see U.S. Pat. No. 5,447,887 to Filipiak et al. However, copper silicides exhibit a relatively high electrical resistivity and may cause an unacceptably large increase in resistance of copper interconnects. Moreover, copper silicides have been reported to be reactive with atmospheric oxygen and tend to suffer resistivity increases upon exposure to oxygen at room temperature. In addition, problems exist in forming the copper silicide which, in turn, leads to non-uniformity and non-repeatability of the procedure.
Accordingly, a need exists for improving adhesion of layers such as silicon nitride and silicon dioxide to copper surfaces without the concomitant disadvantages associated with using copper silicide.
The present invention relates to improving the adhesion between copper surfaces and surfaces that do not adhere well to the copper surfaces. In particular, the present invention relates to a semiconductor structure comprising a copper member located within a semiconductor device. A layer of copper germanide, germanium oxide, germanium nitride or combinations thereof is located on at least one surface of the copper member. A layer of a material that does not tenaciously adhere to copper is located on the layer of copper germanide, germanium oxide or germanium nitride. The germanium-containing layer improves the adhesion of the poorly adhering material to the copper member.
In addition, the present invention is concerned with a process for fabricating a semiconductor structure which comprises the steps of providing a layer of at least one germanium-containing material selected from the group consisting of copper germanide, germanium oxide, germanium nitride and combinations thereof onto at least one surface of a copper member; and then providing a layer of a material that does not adhere well to copper on the layer of the germanium-containing material. The present invention also relates to a semiconductor structure obtained by the above process.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.
FIG. 1 is a schematic diagram of an example of a semiconductor structure in accordance with the present invention.
FIG. 2 is a schematic diagram of an example of another semiconductor structure in accordance with the present invention.
FIG. 3 is a schematic diagram of an example of a still further semiconductor structure in accordance with the present invention.